A conventional step-up DC/DC converter is illustrated in FIG. 1. Inductor 10 and diode 12 are connected in series between input (VIN) and output (VOUT) terminals. The input terminal is typically connected to a DC source, the controlled output connected to a load. Capacitor 14 is connected between the output terminal and ground. Signal responsive switch 16 and resistor 18 are connected in series between the inductor/diode junction and ground. The switch is represented by a transistor having a base connected to the output of latch 20 through switch driver circuit 22. A set terminal of the latch is connected to the output of AND gate 24. Delay circuit 26 has an input connected to the reset output of the latch and an output connected to a first input of the AND gate. A second input of the AND gate is connected to the output of comparator 28. A first input of the comparator receives a feedback signal related to an output parameter. The output parameter may be the voltage at the output, the feedback signal derived through a feedback circuit 30, the feedback appropriately scaled for comparison with a reference voltage 32 applied to a second input of the comparator. The reset terminal of the latch 20 is connected to the output of a second comparator 34. A first input of comparator 34 is connected to the junction between switch 16 and resistor 18. A second input of comparator 34 is connected to reference voltage circuit 36.
In operation, when switch 16 is in the on, or closed, state, current flows from source VIN through inductor 10 and resistor 18 to ground. Resistor 18 is a sensing element that provides an indication of the current level through the switch when the switch is closed. When the current through the switch increases to the threshold level of reference voltage 36, comparator 34 outputs a signal to reset the latch 20, thereby turning off switch 16. When the switch is turned off, energy stored in the inductor is transferred to the capacitor 14. Delay circuit 26 ensures that the high latch reset output signal is not applied to the input of AND gate 24 until a minimum time interval has occurred. Turn-on of switch 16 is thus delayed accordingly. Thereafter, the switch will again be turned on when the feedback level exceeds the reference input to comparator 28.
In the particular conventional circuit illustrated, commonly known as a boost regulator, regulated voltage output VOUT has a voltage level higher in magnitude than the voltage input VIN and of the same polarity. Known converters, for example, are Linear Technology LT3463 and LT3464 converters. With appropriate arrangement of inductor and capacitive elements, a boost regulator output voltage can be provided with a polarity opposite to that of the input voltage.
In the boost converter configuration, input current through inductor 10 is continuous, flowing either through switch 16 or diode 12. With a fixed minimum off-time of the switch 16, the current in the inductor can exceed the maximum current capability of the switch. Such situation can occur, for example, during a short circuit of the output to ground, during the charging of the capacitor 14 immediately after power is applied to the circuit, or any such charging of other circuit capacitors upon initial operation. The switch must turn on for a finite time to sample the inductor current before it can be determined by means of comparator 34 that the current exceeds the current limit threshold of reference 36. During the off-time of the switch, the inductor current does not ramp down as much as it increased during the short on-time because of the small reverse voltage across the inductor. Excessive switch current thus can occur and cause damage or destruction to the regulator as well as the switch.
Prior methods of dealing with the possibility of excessive inductor current have been known in general as frequency foldback provisions. These methods sense a low output feedback condition and accordingly increase an oscillator period in the control circuit of the switch, or increase the delay period, to lengthen the switch off-time by a fixed amount. Frequency foldback methods are disadvantageous in that the increased off-time may not be sufficient to prevent switch current runaway. Because of the uncertainty about external element values, the set off-time may be made too long, thereby unnecessarily (VIN) constraining output current capability during normal operation.
The need thus exists for improved implementation for protection against overcurrent conditions in regulator circuits.